Newshot
Account

Rapidus Reportedly Considering Delaying 2nm Advanced Process Mass Production to Fiscal 2028

Source: IT之家 Published: Business & Funding 中文 Rapidus2nm
AI summary

Japan's Jiji Press reported on the 11th local time that advanced semiconductor manufacturer Rapidus is considering postponing mass production of its 2nm logic semiconductor process by one year to fiscal 2028 (April 2028 to March 2029). Rapidus began trial production of 2nm transistors in 2025; sources told Japanese media that it has since faced numerous obstacles in developing technology to integrate transistors with other components and has been unable to achieve high-performance targets, while other reports say Rapidus is working to improve chip yields.

Translation(model translation, not the source's own text)

Report: Rapidus considering delaying 2nm advanced process mass production to fiscal 2028

IT之家 November 13 news: Japan's Jiji Press reported on the 11th local time that the country's advanced semiconductor manufacturer Rapidus is considering postponing the mass production timing of its 2nm logic semiconductor advanced process by one year to fiscal 2028 (April 2028 to March 2029).

Rapidus started trial production of 2nm transistors in 2025. Sources told the Japanese media that since then Rapidus has faced numerous obstacles in the technical development of integrating transistors with other components and has been unable to achieve its high-performance targets; other reports say Rapidus is working to improve chip yield.

  • "Report: Rapidus encounters problems with SRAM, mass production target within fiscal 2027 faces challenges"
  • https://www.jiji.com/jc/article?k=2026111000768

Advertising statement: External redirect links contained in the article (including but not limited to hyperlinks, QR codes, passwords and other forms) are used to convey more information and save selection time; the results are for reference only, and all articles on IT之家 containing external links include this statement.

Related articles

  • Report: Rapidus encounters problems with SRAM, mass production target within fiscal 2027 faces challenges
  • IBM plans to launch early-development PDK for its 7A nanostack cutting-edge process in 2027Q1
  • Report: TSMC successfully completes R&D and certification of A16 backside power rail advanced logic process
  • Cadence AI-driven reference flow certified on Intel Intel 18A-P / 14A nodes
  • Socionext develops HPC SoC based on TSMC A14 process, targets test tape-out this September
  • TSMC: Five N2 fabs ramping capacity simultaneously this year, N2 first-year output up 45% versus N3

The translation is machine-generated and individual terms may be off. Nothing is rewritten or cut; the original is authoritative.

Published by IT之家
This site only summarises and aggregates; copyright stays with the original author. Headlines and summaries follow the source — where they differ, the original wins.
Read the original ↗